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The Semiconductor Technology Roadmap
(1/12/2005) Future Fab Intl. Issue 18
By Bill Spencer, SEMATECH
Linda Wilson, SEMATECH
Robert Doering, Texas Instruments Incorporated
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The US semiconductor industry has generated a coordinated technology roadmap since 1987, when the members of SEMATECH developed a five-year operating plan to return the US semiconductor industry to technology leadership. The roadmap process is a consensus-building of leaders in industry, universities and government, and thus has the benefit of collective input beyond what any single company, university or government agency might provide. It is dynamic information in the sense that it is often updated and may be substantially changed as new technologies and science become available.

The purpose of this paper is to give a brief history of the semiconductor roadmapping process (first in the United States and then internationally); to describe the roadmapping process as practiced by the international semiconductor industry; to point out what a roadmap is and is not; and to outline some of the lessons learned and possible areas where roadmapping might be useful in other industries. (The complete version of this paper is presented online at www.future-fab.com.)

The U.S. semiconductor industry has generated a coordinated technology roadmap since 1987 when the members of SEMATECH developed a five-year operating plan to return the U.S. semiconductor industry to technology leadership. SEMATECH, the R&D consortium in Austin, Texas, developed an ambitious goal to use 100% U.S. manufacturing equipment to reach a 350nm manufacturing process by 1993.

In 1989, two years after the formation of SEMATECH, the National Advisory Committee on Semiconductors (NACS) developed an aggressive plan for the US semiconductor industry called Micro Tech 2000. The NACS was a three-year effort initiated by the first Bush Administration to determine how to strengthen the U.S. semiconductor industry and return it to market leadership. The Micro Tech 2000 effort was the result of a meeting of seventy-five scientists and engineers that proposed to skip a technology generation and introduce a 1Gbit SRAM semiconductor memory in 2000, about five years ahead of the introduction based on historical trends.

When NACS charter ended in 1990, the organization made a request to the Semiconductor Industry Association (SIA) to sponsor Micro Tech 2000. The NACS' request to the SIA was assumed by the association's Technology Strategy Committee (TSC). The TSC delegated responsibility to SEMATECH. An obvious choice, SEMATECH had the resources, personnel, and experience in technology forecasting and planning.

SEMATECH organized and funded a workshop in Irving, Texas in November, 1992, inviting over two hundred engineers and scientists from industry, universities, and government to discuss what should be done to further strengthen the U.S. semiconductor industry. Representatives from both the semiconductor industry and the semiconductor manufacturing equipment and material industries were represented in the meeting. The workshop recommended that technology projections and the supporting R&D effort be "roadmapped" for the next fifteen years, from 1992 to 2007.

Eleven essential technology areas in semiconductor manufacturing were each studied by a separate group. SEMATECH and the Semiconductor Research Corporation (SRC) jointly provided technical leadership in each technology area, usually by a technology leader from SEMATECH or members of the Technology Advisory Board of the SRC. SEMATECH hired a consultant to manage the process. SEMATECH also provided the funds to pay university participants' expenses, and the costs of consultants to assist in writing, editing and publication of the report.

The result of this effort was the first national semiconductor technology roadmap in the world. The report was a set of two related documents published in mid-1993. (Interestingly, neither of the two documents was called a "roadmap.") The report projected the timing of future technology generations, indicating the likely technology solutions for each of the eleven manufacturing areas and where research was needed to find solutions to future technology challenges. In cases where more than one technology solution was being pursued, time tables suggested when choices would be necessary to keep the industry on its historic productivity curve (in part, known as "Moore's Law"). The report was revised in 1994 (the number of technical areas was reduced to eight) and again in 1997. The roadmap name was first adopted for the 1994 National Technology Roadmap for Semiconductors (NTRS) document.

It is unfortunate that the term "roadmap" was chosen to describe the report of the 1994 effort, as a "roadmap" gives the mental picture of a known journey with a definite start and finish, including where turns are necessary and the exact destination. The semiconductor roadmap process does not result in that type of document. It attempts to show what technologies might be needed to continue down a historical progress/learning curve, but does not presume to be a precise forecast of which solutions will definitely satisfy the future requirements. It often describes several alternatives, any one of which might serve in future manufacturing. However, it does strongly attempt to indicate where additional long-term research is needed to provide a breakthrough or added capability to remain on the historic trends.

The roadmap process is the consensus gathering of the leaders in the industry, universities, and government, and, thus, has the benefit of collective input beyond what any single company, university, or government might provide. It is dynamic information in the sense that it is often updated and may be substantially changed as new technologies and science become available.

The purpose of this paper is to give a brief history of the semiconductor roadmapping process (first in the U.S. and then internationally); to describe the roadmapping process as practiced by the international semiconductor industry; to point out what a roadmap is and is not, and to outline some of the lessons and possible areas where roadmapping might be useful in other industries.

The first section of this paper is a history of the first roadmaps. The second section covers the roadmap process from about 1995 to the present time. During this period, the process was expanded to include input from every major geographical area involved in semiconductor manufacturing. Additionally, the information progressed from a paper document to include electronic media. The third section gives a specific example of technology roadmap projections for lithography. The fourth section summarizes some of the principal lessons and recommendations for anyone wishing to use this type of process for industry roadmapping In addition there are some of the impacts of the roadmap on long-range research, university funding, and government programs, as well as the impact on the semiconductor industry itself and, in turn, its impact on the global economy. It is hoped that this summary will be useful to historians of science and technology, to other industries, and for pedagogical use in universities and colleges. A comprehensive review of semiconductor roadmap technology can be found in the chapter by Doering on "The Challenge of Developing a Roadmap from Microelectronics to Nanoelectronics" in Advanced Semiconductor and Organic Nano-Techniques-Part I: Nanoscale Electronics for Computers and Optoelectronics for Telecommunications, Hadis Morkoc, ed., Academic Press, London, 2003.

Progress up to 1995

This section is a summary of an earlier paper prepared for the Third Semiconductor Symposium held in Beijing, PRC in 1995. An edited version of this earlier paper, "International Technology Roadmaps: The US Semiconductor Experience" will appear in a National Research Council (NRC), Productivity and Cyclicality in Semiconductors; Trends, Implications, and Questions, edited by Dale W. Jorgenson and Charles W. Wessner, Washington DC: The National Academies Press, to be published in 2004.

The semiconductor industry was created in 1947 with the invention of the transistor at Bell Telephone Laboratories. The federal government required the Bell System to release all transistor patents in 1956.

The industry received a major change in the late 1950s with the demonstration of the integrated circuit nearly simultaneously at Texas Instruments and Fairchild Semiconductor. The growing availability of this technology quickly led to world-wide application and manufacture of semiconductor devices. (Until the 1980s, the United States had a significant market share lead in semiconductor device manufacture and an even larger lead in the sale of semiconductor manufacturing equipment.)

In the 1970s, the VLSI program sponsored by the MITI government in Japan, gave Japanese companies help in investing in R&D and in the capital necessary to challenge the U.S. in the semiconductor market in the 1980s. This cooperative effort in Japan (coupled with global market recessions in the early 1980s, better manufacturing, and higher quality) gave the Japanese market leadership in the sale of semiconductor devices, particularly in the Dynamic Random Access Memory (DRAM) chips, the largest market segment.

The loss of U.S. market leadership led the Department of Defense and the SIA to propose the formation of a joint industry/government consortium, SEMATECH, focused on improving semiconductor manufacturing technology. The consortium was located in Austin, Texas and funded at $200 million per year, with half the costs borne by industry and half by the U.S. government.

Earlier in 1983, the SIA had formed the SRC to provide research funding to key U.S. universities in semiconductor technology. The initial purpose was to ensure a continuing supply of well-trained scientists and engineers for the semiconductor industry. The activity was very successful in funding the top universities and attracting both top university professors and graduate students. The funding was increased in later years to provide research centers focused on key topics to ensure semiconductor technology remained on the leading edge.

The first members of SEMATECH participated in a series of workshops in Monterey, California to develop plans for the U.S. to reach a competitive technology position by the early 1990s using 100% U.S.-developed manufacturing equipment and processes. A group of about twenty planners, in a series of two dozen workshops, developed plans for demonstration of 350nm technology by 1993, moving the U.S. back into parity with Japan, the industry leader at that time. These early workshops addressed over fifteen different technologies related to the manufacture of silicon integrated circuits. The group chose to focus strictly on silicon material with Complementary Metal Oxide Silicon (CMOS) as the device technology. The plan had three phases- 1) an existing 800nm process from AT&T, 2) moving to a 500nm process, and 3) demonstrating a 350nm devices. In 1987, the wafer size was 150mm diameter; at the time of demonstration of 350nm technology, wafer size was 200mm diameter.

The 100th Congress established a National Advisory Committee on Semiconductors (NACS) in 1988 as part of a national reaction to the loss of market leadership in semiconductors. Between 1989 and 1992, the NACS published a series of reports for strengthening the U.S. semiconductor industry. One of the ad hoc working groups of NACS focused on accelerating the 120nm technology ahead of the industry trend. The working group published a report, Micro Tech 2000, in August of 1991. This report outlined the planned introduction of a 1-Gigabit Static Random Access Memory (SRAM) with 120nm technology by the year 2000 as shown in Figure A.

The Micro Tech 2000 report was based on SEMATECH meeting its goal of having a 350nm technology on 200mm wafers by 1993. The plan called for three additional generations of technology leading to the 120nm technology in 2000. When the NACS' three-year tenure was up in 1992, the Micro Tech 2000 proposal was handed to the SIA.

The 1992 Semiconductor Technology Workshop Report

The SIA formed a Technology Strategy Committee to determine what to do with the Micro Tech 2000 report and semiconductor technology in general. In discussions with SEMATECH and the SRC, a workshop was set up in Irving, Texas in November, 1992, to merge the Micro Tech 2000 with the earlier SEMATECH roadmap and to consider possible future technology directions. There was a great deal of work done prior to the November workshop by the SRC, SEMATECH, and representatives from industry, government, and academe. This pre-work was headed by a SEMATECH consultant, who laid the ground work for the later workshop.

The workshop attracted over 200 engineers and scientists from government, industry, and universities. There were eleven technology working groups chaired principally by leaders from SRC and SEMATECH. The three-day workshop used break-out sessions to refine and extend the pre-work. The final session was a presentation of the working groups efforts and the comments, and inputs from the general session led to the publication of two documents in 1993, an executive summary entitled Semiconductor Technology Workshop Conclusions and a detailed report called Semiconductor Technology Workshop Working Group Reports. Figure B indicates the Lithography requirements identified through this effort.

The working groups defined critical success factors and core competencies needed for progress. Common themes and elements led to a set of overall key challenges that are shown in Figure C. In this figure, the progression of feature sizes and chip complexity follows what was then the historical trend, that is, a new technology node every three years. Entries are organized by date of introduction of production startup; however, some entries reflect attributes of each technology generation at maturity. These characteristics were starting points for working group deliberations.

Although this was an entirely US effort, the results were widely published and the content shared on an international basis.


While Micro Tech 2000 envisioned a 1Gbit SRAM by 2000, the 1992 workshop projected the 1Gbit DRAM technology node in 2004. (In actuality, SRAM technology for a 1-Gbit chip was available in 2001. Economic drivers made it more efficient to make smaller memory chips at that time)

The 1992 and 1994 roadmap documents had a profound effect on technology generations as well as many other aspects of semiconductor manufacture and R&D. Certain elements of the 1992 document, e.g., the technical characteristics, critical requirements, and core competencies, have endured throughout the generations of roadmaps. Technical characteristics continue as overall roadmap characteristics. Critical success factors evolved into technology requirements and core competencies began to include and now are the potential solutions. Success of these early industry roadmaps' efforts indicated that the activities were useful and did serve as a guide the industry could use to mitigate shared challenges of manufacturing, as well as cooperate in pre-competitive areas of research.

The 1994 NTRS

As breakthroughs in research occurred and market climate improved in the U.S. there was a general consensus that the roadmap should be renewed in 1994. The oversight committees merged into a single group called the Roadmap Coordinating Group (RCG) and the roadmap technologies were described in chapters written by the corresponding technology working groups (TWGs). The number of technologies was reduced to eight from the original eleven in 1992. These working groups updated the 1992 technologies and extended the time frame to 2010, since the document was not to be published until the end of 1994. There was a one-day workshop in Boulder, Colorado with over 300 attendees. The technical working group chairs presented their summaries, and there was feedback from the entire meeting. Again, most of the working groups were chaired by technical leaders from the SRC and SEMATECH.

The 1994 update used Moore's Law at a pace of one technology node (i.e., four times increase in memory per chip) each three years. Alternatively, this corresponds to a doubling of devices per chip each eighteen months. This pace had been the trend for several decades, and there appeared to be no reason to project a change. However, the 1997 update would find that the three-year cycle for technology changes was not holding.

Several events occurred between the 1994 and the 1997 roadmaps. Three years was too long to wait for an update in an industry roadmap with technology that progresses as rapidly as those associated with semiconductors.

Also, in 1994, SEMATECH informed the U.S. federal government that it no longer required its financial support for R&D. The government was graciously thanked for helping an industry in need, and, as the U.S. semiconductor industry had regained market leadership, it would now fund its own R&D.

The end of government funding allowed the establishment of a SEMATECH project to bring the world-wide semiconductor industry together to set the standards and timetable for conversion from 200mm wafers to 300mm wafers. This project, the International 300mm Initiative (I300I) was started by the SEMATECH board of directors in 1995 and included every major semiconductor company outside of Japan. Japan started their own effort (SELETE) to manage their 300mm conversion.

Ultimately, the I300I program led to the internationalization of SEMATECH and a name change to "International SEMATECH," which included most of the companies that participated in I300I. It now made sense to include non-U.S. companies in the preparation of the roadmap. This would lead to an improvement by: (1) bringing in views from every economic region that had a significant semiconductor industry and (2) a sharing of the cost, particularly the time of individuals involved in preparing the roadmap content. The cost of the roadmaps had been borne principally by the SEMATECH member companies. During this period, the roadmap was also transformed from a paper document to an electronic format to facilitate the updating. The next update of the roadmap after 1997 would be an international document with input from five regions: Japan, Europe, Taiwan, Korea, and the U.S. All of the working groups as well as the oversight committee were to have equal international representation.

The 1997 Roadmap

From 1994 to 1996, research and development activities were monitored jointly by the SRC and SEMATECH to determine overlaps and gaps in research programs at U.S. consortia, universities and national labs. The NTRS was deconstructed to a taxonomic outline, and then programs in each research sector were "mapped" to these categories and counted by each organization. The result indicated areas of extreme need that were not being addressed as well as areas that indicated duplicated programs and could possibly be partnered or leveraged better to benefit those organizations working separately at that time.

This "gap analysis" was completed with mixed success regarding the original objective; the SRC and SEMATECH were the primary contributors with mixed input from other organizations. However, another outcome was that using the roadmap in this fashion focused the research communities in the U.S. in a way that had not been formalized before, and resulted in a change to the format of the NTRS that has become a standard for industrial roadmaps.

The RCG created a list of grand challenges as a rally point for the industry. Affordable scaling and lithography beyond 100nm, new materials and structures, device performance, metrology and test capability and costs were detailed. The research and development challenges facing the semiconductor industry were presented, alerting all to the fact that stand-alone solutions were limited, and a systems solution was indicated. Real research cost leverage and collaboration among the entire community was heralded as the answer to the future for semiconductor R&D.

The response to the 1994 NTRS indicated that the requirements in the 1994 NTRS were too broad and needed quantified data with notations as empirical or historical sources. The RCG also determined that there were two primary audiences. The research community needed a longer term view for potential innovations, thereby allowing time to do basic research to potential proof of concept for industry. This projection of the long-term requirements started about seven years from the current year. The supplier and manufacturing communities needed a nearer term perspective indicating requirements and technologies within two to five years, giving them a reasonable lead time to develop to commercialization while minimizing risk by comprehending a near-term focus on particular needs and potential solution sets.

To focus on the near and long-term aspects of technical challenges, each technology domain presented the most difficult challenges for up to 100nm for the manufacturing and supplier communities, to highlight attention on near-term needs. Also, challenges projected for beyond 100nm were presented to allow the research community to begin focusing on those areas to benefit most from innovation and viable solution sets.

Additionally, the nature of a technology need (solution known, solution being pursued, or no known solution) was a valuable dimension to show immediately the level of risk/difficulty in continued scaling to Moore's Law. Likewise, projecting the state of a potential solution in the timeframe of the roadmap (research required, development underway, or qualification/pre-production) was valuable for both near and long-term assessments as a forecast for maturation of a manufacturable solution.

After the 1997 roadmap was published, several events compelled key decisions that would change the face and effort of the roadmap to a level never seen in the industrial world. Already the NTRS was a phenomenon in the nation as a successful industrial effort to focus research and development. The NTRS was also made available on the internet in a limited fashion to the U.S. industry public, allowing accessibility unprecedented as a repository of information for review with several thousand web visitors monthly.

In the mid-1990s, the semiconductor industry was in accelerated growth from the historical profitability and productivity indicators; there was speculation that competitive edge could be gained by "beating the roadmap" forecasts for technical capability. Thus, the 1997 NTRS was viewed as obsolete only a few months into release.

Interest in the roadmap among international community was increasing, particularly with the supplier community. Indeed, as seen with the globalization of SEMATECH and I300I, the health of the industry was now dependant on a global community of chip manufacturers and their supplier base for equipment and materials. Additionally, there was increased pressure from several regions in the world to produce similar national roadmaps based exactly on the NTRS; thus increasing a potential of disparate directions and furthering risk to the industry community as a whole. For continued industry success many believed the roadmap assessments and projections would best be served by review from the international industry community. The Roadmap Coordinating Group saw a potential benefit of an international review and comments from global manufacturers, suppliers, and researchers to ensure one strong direction for the entire semiconductor community.

To address the accelerated industry, the RCG made the decision to provide a formal update (in 1998) to the 1997 NTRS, and thus creating an annual review process and roadmap effort. In consideration of obtaining international review, the forum of invitation was decided to be the 1997 World Semiconductor Council. A key set of requirements by the SIA Technology Strategy Committee, were to (a) remain focused on technology assessments and future requirements; (b) continue to encourage innovation by suggested potential solutions, and (c) review and produce a solid roadmap in the same annual timeframe as with the NTRS.

Four regions of the world that were already WSC members were invited to participate in the review of the 1998 Update to the 1997 NTRS-Europe, Japan, Korea, and Taiwan. As the regions assigned which associations were the formal sponsors for their own industrial communities, the RCG outlined the form of membership that would ensure equitable review.

Each region would establish their own technology working groups and executive committees, much like the existing RCG and TWG structure in the U.S. Each region would then assign two representatives from each team to attend international roadmap meetings with the idea of sharing regional information among the regions to distill the final roadmap messages for the industry community. The executive roadmap steering committee also had two representatives with this group, known as the International Roadmap Committee or IRC.

The 1998 Update effort was successful-with all roadmap tables reviewed by all regions, feedback from all sectors (manufacturing, supplier, research and consortia), several international meetings, an established network of electronic communications, and the groundwork for an international sponsorship of a semiconductor roadmap. Additionally, the global review process structure was managed to an annual schedule

The 1999 ITRS

In 1999, the semiconductor roadmap became the first international technology roadmap for any industry in the world. The four participating regions during the 1998 Update process were formally invited by the SIA to cooperate jointly in the 1999 edition process. This cooperative effort paved the way for a equitable sponsorship for the 2001 edition. The roadmap was renamed the "International Technology Roadmap for Semiconductors," also known as the ITRS.

In the 1999 ITRS, the overall technology characteristics for the roadmap began to indicate a timing relationship of the leading-edge technical capabilities between memory (specifically DRAM metal line ½ pitch) and general logic devices architectures, such as the printed and physical gate lengths. While the pace of the roadmap was still based on the DRAM technology generations, users of the roadmap could see the various technical requirements with respect to either memory or logic devices.

The IRC decided to continue to direct focus on near and long-term needs by redesigning the technology requirements tables as near and long-term ranges. The near-term data were annualized out for the seven years to present the detail and accuracy required for those communities forming their five-year plans, while the long-term tables were more of a snap-shot of projections to indicate possible areas of risk/requirements where more research and collaborative effort could be focused-as such the long-term tables indicated data intervals of three years for the remaining eight years of the roadmap timeframe. With the added dimension of red cells to indicate needs with no known solutions, these long-term tables also served as a immediate guide for troublesome technology requirements.

The 2000 Update

The 2000 cycle of table updates for the 1999 ITRS was another opportunity for the new ITRS process and teams to continue to work together on reviews and global management of the ITRS information. Part of the review indicated the necessity of the working groups to interface among the various teams to provide consistency in the table data to correct "disconnects" from chapter to chapter. As such, "cross-TWG" meetings were scheduled with each workshop, to enable closer review of related technologies and dependent requirements.

Two benefits from these meetings became obvious. They provided forums for discussion among the TWGs and regions, building communication links between related TWGs. These meetings also began to enable a "systems approach" to the roadmap-considered a vital goal in the 1997 NTRS. For example, many teams that appeared to have disparate technologies learned that while particular technical disciplines may operate in different realms of process science, it was necessary to comprehend that the requirements of one team had consequences (new challenges) or requirements on others for a proposed solution (e.g., new material, design, or architecture).

The 2001 ITRS

In the 2001 edition effort, a memorandum of understanding was produced by the SIA to ensure copyright ownership and to establish equal sponsorship among all five regions-the European Electronic Component Association, the Electronic Industries Association of Japan, the Korea Semiconductor Industry Association and the Taiwan Semiconductor Industry Association.

International SEMATECH was recognized as a key component in maintaining consistency in the process and continued to serve as the hub of communication and information. The internet began to play a significant roll in not only disseminating the roadmap but as part of the review process. Through internet mail and posted draft information, global access and continual review capability was possible throughout the world, as part of an efficient medium for information sharing. Also, the sense of shared ownership and voice in developing the roadmap was maintained, as all participants world wide could receive the information at the same time.

In the 2001 ITRS, a review of the definitions within the roadmap, particularly those for the technical drivers for the roadmap, was an intense effort by the IRC. Also, as the industry continued to segregate into "logic" or "memory" factories, the need for clear metrics of technical capability indicating the next generation processes and equipment, and the need to pinpoint and project the trend of the industry in general became more scrutinized by the roadmap users.

For the 2001 ITRS timeframe, areas of criticality and technical limitations for planar CMOS approached the five-year mark. The IRC instructed the working groups to indicate breakthrough technologies and novel solutions. A new chapter called System Drivers was introduced to define application drivers that cut across technology sectors. New materials beyond CMOS and a section discussing emerging research devices were presented. Recognizing that not all concepts were feasible but that innovation in particular areas needed to be encouraged at this time made the roadmap projections more extendable. However, it was clearly noted that the roadmap did not endorse particular technological or architectural concepts, rather presented what research was underway and could be viable within the fifteen-year timeframe of the roadmap.

The 2001 ITRS and the subsequent 2002 Update also included background materials available in the electronic versions of the ITRS. This capability provided a level of detail for the models and algorithms used to extrapolate data based on the drivers provided in the overall roadmap technology characteristics. For the first time, several technology working group teams provided readers with actual electronic working tools used to derive data for the roadmap.

The 2003 ITRS

Clarification of definitions and drivers continued with the 2003 ITRS effort, as well as close monitoring of the industry indicators and latest production devices for a given technology generation. Such monitoring was necessary to ensure that the pace indicated by the ITRS for DRAM as the dominant driver for the roadmap was accurate.

Another area of focus was the impact that emerging research devices would have on the current technologies in the long term years. Understanding the challenges presented by disruptive technologies as early as possible was important as solutions for the industry began to include new materials, architectures, and integrated systems.

By this time in the history of the roadmap the structure of the process-team demographics, clear meeting objectives with cross-team engagement, leadership early in the definition of drivers and timing of technologies, public feedback, electronic media-enabled substantial volume of detail and tools for the users of the ITRS. It began to evolve to include the projection of key challenges, requirements, possible solutions based on historical trends, and current industry indicators, as well as becoming a feedback mechanism enabled by electronic media. Discussion groups within a working area of the internet allow participants worldwide to use latest models to present data to their regions quickly and in some cases, interactively with each other.

With this capability, the roadmap process continues to evolve as well. Accessed by an average of over 20,000 visits each month via the internet, the roadmap is now used as a strategic planning tool and guide for the semiconductor community. It is recognized internationally as a sourcebook containing areas needing innovative solutions for the industry, as well as an effort that highlights possible opportunities for coordinated and leveraged research. The complete version of the 2003 International Roadmap for Semiconductors and all the supporting models and information can be found on the ITRS website, http://public.itrs.net.

Lithography as an Example of Semiconductor Roadmap Evolution

As pointed out in the first roadmap the largest cost in CMOS manufacture is lithography. The lithography step includes materials, masks, and inspection, as well as the exposure tool and other process costs. Lithography costs have increased over the 1992 estimate of 35% of the total manufacturing cost of integrated circuits. Today lithographic exposure tools can cost over $10 million. The increased cost are due to higher mask cost as well as the cost of the exposure tool. Thus, in a modern fabrication facility, lithography costs dominate the entire facility costs. With that in mind, it is interesting to see how the lithographic technology has evolved in the eleven years from 1992 to 2003.

The first roadmap included the chart shown in Figure D. The principal lithographic tool at that time was based on an I-line source (365nm wave length). The expected extensions were to 248nm light sources and later to 193nm. These were major changes and it was not certain how the many problems were to be solved. Beyond the 193nm tools, there was a question as to whether x-ray or e-beam tools might become commercially feasible. The chart shows that lithographic process was a big question mark beyond 193nm technology.

The resolution available with a particular light wave length is directly related to that wave length and inversely related to the numerical aperture of the exposure tool The relationship to wave length and numerical aperture is controlled by an empirical constant that depends on a number of effects. Over the last ten years, lithographic engineers have been able to reduce the value of this empirical constant substantially and as a result higher resolutions have been obtained with the tools identified in the 1992 roadmap. In addition, there have been other technologies identified as potential and real manufacturing tools.

Figure E from the 2003 ITRS shows that 193nm technology has been extended to 90nm lines and that another optical, actually a ultraviolet source, at 157nm will extend optical lithography to 65nm. This extension is possible through the development of new optical materials and the development of optical techniques to increase resolution at a given wave length. In 2003, the development of other lithographic technologies, not x-ray or e-beam, are under way to extend lithography to the order of 20nm. None of these technologies were imagined in 1992.

The changes between the bar chart from 1992 and 2003 are an example of how the roadmap has evolved as science and technology have advanced. It is also the reason that the current semiconductor roadmap is continually updated. In an industry like semiconductors that moves rapidly, if the roadmap is to be meaningful, it must be constantly updated. If the other technologies in the roadmap were used as examples, it would be evident that each has undergone major change over the last decade.

Figure E 2003 ITRS Lithography Exposure Tool Potential Solutions

The Lessons and Impact of the Semiconductor Roadmap

The semiconductor roadmap has undergone major changes in the twelve years since its inception in the fall of 1992. The initial document was created by a few people developing a general document before a general meeting of a few hundred U.S.-only engineers and scientists. Today the roadmap involves almost a thousand technologists from five major economic regions. The contribution of personnel from each geographic region is shown in Figure F. The document itself has evolved from less that a hundred pages to over six hundred. The content has changed from a focus on CMOS silicon devices to include other devices and materials. The document has changed from a paper format to an electronic format and the renewal now occurs annually to reflect changes in technology, either the device, material, or manufacturing technology.

These changes have made the ITRS more useful and pertinent. The roadmap has been accepted world-wide as the better predictor of directions, challenges and opportunities in the global semiconductor industry. The willingness of leading technologists to give their time and energy to the perpetuation of the ITRS indicates the usefulness of the document and the process used to renew and update it. The effort is funded entirely by the organizations whose employees are responsible for the effort.

The semiconductor roadmap has had an immense impact on government, industry and universities. In the U.S., the impact on the government programs in semiconductors has been mixed. The government funding has decreased over the last decade. Part of that has been the perceived success of the U.S. semiconductor companies in regaining market share. Also the end of federal funding for SEMATECH in the mid-1990s has been part of the decrease. On the other hand, both federal and state governments have used the roadmap to select the areas for funding. This use has led to a more efficient solution of short-term technology issues for semiconductors and to focusing on the more promising long-term issues.

The U.S. universities have used the semiconductor roadmap to select research areas as well, due to the potential funding availability and based on those identified research areas where the roadmap indicates a need. It is also more likely that the graduate students working in these research areas will populate jobs in the semiconductor industry.

Perhaps the major impact of the ITRS has been in industry. The pace of the technology generations have shortened from three to two years since 1995. The Y axis in the Figure G (Historical Acceleration of the Roadmap) shows the technology generations of DRAM minimum feature size (metal line ½ pitch) over the past two-to-three decades (500nm down to 25nm). The curves show the actual "pull-in" of those technology generations over time as indicated in the roadmap projections in the years 1997 and later.

The reason for this decrease is not entirely clear. The semiconductor roadmap has identified the major manufacturing challenges and this effort led, in many cases, to solutions being available for advanced technology earlier than without the roadmap. Including the manufacturing equipment manufacturers and material suppliers has also led to an acceleration in solutions of manufacturing issues. A good example was the effort to introduce 300mm wafers into manufacture. Coordinated efforts to resolve standards, schedules, and other aspects of the new materials led to earlier and easier introduction of the new wafer size.

The roadmap has also given the entire industry a single voice in the issues it faces. It has gained solid credibility and when resolution is required, reference is often made to the most recent version of the ITRS document. This is true whether setting research or development directions or providing input to the electronics industry where the semiconductor performance is closely watched. In fact, the entire information technology industry uses the roadmap projections to determine the capability of communications and computers in the future. Figure H shows key product drivers from the 2003 ITRS and the projections used by the industry today.

A question often raised is, "Can the ITRS process be applicable to other industries and especially to areas of basic science?" The process of strategic planning is certainly done in every well-run industry. The semiconductor roadmap effort is definitely a strategic planning process. Proprietary corporate "roadmaps" have existed for decades.

Indeed, since its creation, several industries have used the ITRS as a model for a roadmap process. These include such roadmaps as the National Electronics Manufacturing Initiative (NEMI) Roadmap, the Avionics Roadmap (which has spawned subsequent FAA roadmaps), and the Compound Semiconductor Roadmap effort, as well as an abundance of roadmapping services.

The question of roadmapping in the basic sciences is more problematic. Certainly, it is not possible to predict where scientific breakthroughs will occur. However, it is possible to identify the more promising areas of research. (If the scientists in these areas are not willing to identify such areas, the task will undoubtedly be done by funding agencies. Then the most persistent lobby will generally have the edge in obtaining funding.)

It is possible to construct a comprehensive roadmap that begins to map the connections among the various basic sciences, technologies, and eventually, related research across various industries. Global attempts are now underway to baseline basic scientific research in the areas of information, biomedical, and nanotechnology realms to identify common dependencies. Much like the early semiconductor effort, the concepts are to either forecast future areas of opportune research leveraging to benefit multiple technologies and industries; to identify critical challenges that may require breakthrough innovations; and/or to better enable R&D efforts either already underway or to encourage new research partnerships and cooperation.

There are several lessons to be considered by any organization or industry that is planning a roadmap effort. Certainly having an industry organization such as the SIA in the U.S. and similar organizations in other economic regions is a major asset. These organizations can serve as coordinators and implementers. In the U.S., the SIA was also instrumental in setting up the consortia that supplied much of the early technical expertise (e.g., the SRC and SEMATECH) for the semiconductor roadmap as well as the funding. Such consortia can also be the conduit to the important technical talent in other economic regions when the effort becomes international.

Is it a good idea to start as an international effort? In the case of the semiconductor roadmap, the effort was done first on a national basis with limited distribution. The effort required to involve other nations and regions was significant. It was also an effort to convince the U.S. participants that international cooperation would be beneficial. On the whole, the initial effort as a smaller national effort seems the better approach.

Continuity of leadership and editing are also important for a successful effort. The editing of the roadmap since 1992 has been managed at SEMATECH, now International SEMATECH. This gives a consistency to the information and a solid historical archive for past process and earlier documents. The early U.S. effort depended on leadership from the U.S. semiconductor industry and the first leaders came from SEMATECH and SRC members. The roadmap process is now led by an international team of industry experts.

Funding for the effort is an important consideration and sponsorship of the effort must be addressed in the initial planning. The roadmap process is not inexpensive. The budgets for travel, consultants, meetings, and the editing and publication of the first roadmaps were about one million dollars per year. These first efforts were funded by SEMATECH. Committed sponsorship and dedicated funding is a fundamental requirement for a successful roadmap effort. With this financial consideration is the fact that an industry roadmap is an ongoing event as developments in technology continue.

Dependencies among industries will continue to grow, particularly as the world explores the realms of nanotechnology. Likewise, the pace of advances in sciences and technologies, and the opportunities they invite require consideration and forethought. Roadmapping enables the possibility of future assessment for management decisions in research and development. Roadmap efforts, as indicated in the successful ten years of the ITRS, align an industry and mitigate risk as such assessments help to focus research communities and infrastructures. Additionally, cooperative relationships begun in roadmapping efforts encourage potential partnerships in future research, thus ensuring implementation of the projected suggestions roadmapping provides.


A Strategic Industry at Risk. (National Advisory Committee on Semiconductors:Washington, D.C., November 1989.)

Micro Tech 2000 Workshop Report: Semiconductor Technology Roadmaps. (National Advisory Committee on Semiconductors:Washington, D.C., August 1991.)

Semiconductor Industry Association. Semiconductor Technology: Workshop Working Group Reports. SEMATECH:Austin, TX, 1993.

Semiconductor Industry Association. Semiconductor Technology Workshop Conclusions. SEMATECH:Austin, TX, 1993.

W.J.Spencer and T.E.Seidel, "International Technology Roadmaps; The U.S. Semiconductor Experience" in National Research Council, Productivity and Cyclicality in Semiconductors: Trends, Implications, and Questions, Dale W. Jorgenson and Charles W. Wessner, eds., Washington, D.C.: The National Academies Press, Forthcoming 2004.

SEMATECH Annual Report 2000. International SEMATECH:Austin, Tx, 2000.

Semiconductor Industry Association. The International Technology Roadmap for Semiconductors, 2003 edition. International SEMATECH:Austin, TX, 2003.

Doering, Robert. "The Challenge of Developing a Roadmap from Microelectronics to Nanoelectronics," in Advanced Semiconductor and Organic Nano-Techniques-Part I: Nanoscale Electronics for Computers and Optoelectronics for Telecommunications Hadis Morkoc, ed.. Academic Press:London, 2003.

International Technology Roadmap for Semiconductors, 2004. http://public.itrs.net

For other roadmaps: National Electronics Manufacturing Initiative: www.nemi.org/ newsroom/Roadmap_process.pdf

Compound Semiconductors, NIST: www.eeel.nist.gov /812/index.html

Avionics Roadmap: www.dtic.mil/ndia/2002systems /hitt2d3.pdf and www.faa.gov/avr/afs/afs400 /RNProadmap.pdf


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