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Sustainable Growth Through Emphasis On ESH Improvements
(2/2/2002) Future Fab Intl. Issue 12
By Ram Mallela, International SEMATECH
Lee Ann English, International SEMATECH
Walter Worth, International SEMATECH
Coleen Miller, International SEMATECH
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The business case for sustainable growth is profound. The concept of sustainability is gaining ground among business leaders and investors because it is believed to deliver better financial performance and increased long-term shareholder value.

A global benchmark index is tracking the sustainability performance of the leading sustainability-driven companies worldwide. This index, the Dow Jones Sustainability Group World Index, has shown that it would have substantially outperformed the Dow Jones Group Index[1]. These companies achieve their business goals by integrating economic, environmental and social growth opportunities into their business strategies. While a company’s sustainability approach varies and includes several priorities, environmental stewardship is one key priority.

Why Sustainable Growth?

The business case for sustainable growth is profound. The concept of sustainability is gaining ground among business leaders and investors because it is believed to deliver better financial performance and increased long-term shareholder value.

A global benchmark index is tracking the sustainability performance of the leading sustainability-driven companies worldwide. This index, the Dow Jones Sustainability Group World Index, has shown that it would have substantially outperformed the Dow Jones Group Index[1]. These companies achieve their business goals by integrating economic, environmental and social growth opportunities into their business strategies. While a company’s sustainability approach varies and includes several priorities, environmental stewardship is one key priority.

Energy Conservation

For the sustainable growth of the semiconductor industry, energy conservation is a very important issue. Energy consumption directly impacts the cost of semiconductor manufacturing and indirectly contributes to climate change through CO2 emissions released at the power generation facility. The average semiconductor fabrication (fab) consumes approximately 130 million kilowatt hours per year (kWh/yr), based on the International SEMATECH worldwide energy survey[2]. This is roughly equivalent to the energy used in 10,800 single-family homes.

International SEMATECH began an energy reduction initiative in June 1996 with benchmarking studies at 14 semiconductor fabs around the world. The results of the international survey are shown in Figure 1. Through these studies, a base line for energy consumption by fabrication process tools and facility systems has been established.

Figure 1. 1996-98 SEMATECH Fab Energy Survey Data.

The benchmarking effort also examined the level of energy efficiency achieved industry-wide. Targets for further reduction were set based on past trends, emerging newer fab designs with mini-environments, and continuous improvements of process tool and component designs. The International Technology Roadmap for Semiconductors (ITRS) shows the overall energy consumption, in kWh per unit of wafer processed[3]. The ITRS calls for an energy consumption goal of 0.4-0.5 kWh/cm2 by 2003-2004 for the fab process equipment, and a similar goal for the energy consumption by the fab facility systems. For 300mm tools, the ITRS set a goal of no more than 1.5X the energy consumption of an equivalent 200mm tool. These metrics are guidelines for the entire industry, for both device manufacturers and equipment suppliers. International SEMATECH has been using these metrics to drive energy reduction programs across member companies and tool suppliers. These metrics are updated periodically with input from semiconductor manufacturers, equipment suppliers, universities, and research and development organizations.

Based on the International SEMATECH survey, the facility systems consume about 60% of the total fab energy and the process tools consume the remaining 40%. Figure 2 shows how the energy consumption is allocated over the eight major facility systems and process tools. This ratio of energy consumption is somewhat different from the ITRS, which shows a 1:1 ratio based on a wider industry consensus.

Figure 2. Allocation of electrical energy to facilities systems and process tools.

The energy consumption data on tool components has been useful in identifying opportunities for further energy reduction research. For example, the process pumps consume more than half of the energy. International SEMATECH is focusing on pilot projects that study the use of variable speed drive pumps, which lower the speed of the pumps significantly while the tool is in idle mode. This has resulted in an energy savings of at least 25%. Equipment tool suppliers are also working with International SEMATECH in identifying point-of-use pumps, RF generators, and heaters that use less electric power. International SEMATECH is working to drive energy conservation on process tools by setting goals and metrics by technology nodes, process areas and tool types. This will enable tool suppliers and semiconductor manufacturers to track progress against the roadmap.

International SEMATECH has also successfully demonstrated energy reduction in semiconductor fabs by performing exhaust reduction studies on tools at several fabs worldwide. One example showed a potential for exhaust flow reductions of up to 80% on open wet etch tools. Similar studies have been performed on several other process tool types such as RTPs, ion implanters and wet benches with mini-environments.

Re-circulating air fans, along with make-up air fans, exhaust air systems and supporting chillers, account for approximately 26% of the energy consumed in semiconductor fabs. Reduction of the HEPA filter velocity has been another focus for energy conservation. International SEMATECH has successfully demonstrated lower velocities, of as much as 30-40%, at several fabs in the industry, without any impact on product yield. Studies have also shown that lowering HEPA velocities can result in improved pressure differentials, improved parallelism of the flow, reduced particles, and no impact on clean room temperature or relative humidity. One International SEMATECH member company has incorporated the results of these studies in its fabs and has reported operating cost savings of up to several million dollars per year.

In summary, International SEMATECH has a very comprehensive energy conservation program that manages energy reduction projects for both fab facilities and process equipment through collaboration with member companies and equipment suppliers. Through these efforts, we have demonstrated the potential for significant energy reduction in several fab areas leading to substantial operating cost savings and capital cost avoidance.

Water Conservation

Another important issue for sustainable growth of the semiconductor industry is water conservation. Semiconductor manufacturing facilities are sometimes located in regions where water resources are scarce and expensive, and the facility is the community's major water user. Regulations or public perception may limit the water availability in these cases. Even in areas where water is abundant, water conservation is still key to minimizing operating costs and capital expenditures for ultrapure water (UPW) production and wastewater treatment.

Like energy reduction efforts, water reduction can be achieved in a variety of ways. These varied water reduction efforts impact the ITRS goals for net feed water and UPW usage differently. Water can be recovered from UPW production or fab processes and reused, sometimes without treatment. This water can be reused as UPW feed or in cooling towers, scrubbers and irrigation facilities. Water reuse in this manner does not affect the total amount of UPW required in the fab. UPW reduction efforts directly impact both net feed water intake (e.g., from City) and UPW usage.

Before chemical-mechanical polishing (CMP) became a necessity in dual damascene and complex device manufacture, UPW reduction efforts were primarily focused on the optimization of wet cleans. Wet cleans are still a major focus. Shrinking features are more sensitive to defectivity, driving up the number of cleans and the need for a higher UPW quality. The rising number of metal layers requires more cleans to prevent corrosion. As a result of these changing technology needs, a typical fab’s total number of cleaning steps has increased by tenfold between 1980 and 2001[4].

The wet bench was the first workhorse of surface preparation. Batch surface preparation equipment has since expanded to include not only multiple tank wet benches, where chemicals and UPW rinses occur in separate tanks, but also spray tools and single tank processes, that cycle both chemicals and UPW in the same reservoir. Front and back side surface preparation is also performed in single wafer processing tools, where chemicals or UPW are dispensed at the center of a spinning wafer. The centrifugal force sheds the majority of the chemical residue while etching or cleaning requires little or no UPW rinse before the next chemical dispense.

International SEMATECH has collected 200mm benchmarking data on wet benches, as shown in Figure 3. The data shows that the average wet bench uses up to 20 times more UPW than other surface preparation methods. Since wet benches are still necessary for certain processes, water optimization efforts can reduce consumption by up to 40%, by bringing UPW usage within the 2010-2016 ITRS goal for tool UPW usage. Next generation single-tank and single-wafer spin tools have made significant improvements in UPW consumption.

Figure 3. UPW usage for various 200mm surface preparation steps and equipment.

All of the 200mm wet bench usage data was collected in the manufacturing environment. We have found that actual UPW usage can significantly exceed the equipment vendor's recommended settings and even varies between similar tools in the same fab. International SEMATECH plans to benchmark 300mm wet cleans in the manufacturing environment and determine UPW efficiency, as compared to the ITRS and 200mm equipment. The optimization methods for 200mm wet cleaning will be assessed for transferability to the 300mm toolset.

Benchmarking of 200mm tools has revealed that even while a wet bench is in idle mode, UPW is purged continuously. Both idle and process flows can be reduced through standardization. A comparison of identical tools, running similar processes, is a good place to start. A fab typically has access to electrical, overall yield, and light-point defect data for the toolset. If lower UPW flow correlates to adequate wafer quality, the entire toolset can be set to the lowest UPW flow without further split lot studies. Wafer yield will indicate the success of UPW flow reductions, but it is not always necessary to wait for product loss at the end of the line. Wafer pits and particles, tank bacteria counts (bulk liquid phase or biofilm) and contaminant concentrations (water analysis or wafer contamination) can also confirm that process performance has not been impacted by the UPW flow optimization.

Studies at International SEMATECH member companies and tool suppliers have shown that an idle flow of 1-3 liters per minute is sufficient to prevent bacteria growth. A recent study by one International SEMATECH member company showed that a continuous flow of as little as 0.5 liters per minute could inhibit bacteria proliferation[5]. International SEMATECH benchmarking has also shown that some equipment manufacturers endorse the use of intermittent, instead of continuous, idle flows for bacterial inhibition in their post-CMP wet clean modules.

Wet bench process recipes can often be optimized by replacing overflow rinses with quick-dump rinses (for non-HF rinses) and by stopping overflow rinses, when baseline resistivity is met. Such reductions have also had a significant impact on throughput. Reductions on the order of 50% in UPW usage and rinse cycle time are typical. Equipment modifications can also lower UPW usage. Examples include reduced tank size and configuration changes to improve water flow past the wafers. The addition of flow meters enables tool owners to track flow rates and ensures optimal flows are maintained. A combination of flow meters and controllers may manage pressure differences in the UPW supply and improve process stability and yields.

CMP and post-CMP cleaning steps have rapidly become significant UPW users, demanding between 20% and 50% of a facility’s UPW. As shown in Figure 4, International SEMATECH surveyed 200mm and 300mm UPW use for CMP equipment from different vendors. The UPW consumption shown is the total for both the polish module and the post-CMP clean. Therefore, it is expected to consume more water than just a typical cleans process. Even so, Figure 4 demonstrates that the best-in-class 300mm CMP equipment satisfies the ITRS requirements until the year 2007. Other vendors should continue to pursue water reduction efforts.

Figure 4. Combined CMP and post-CMP UPW usage, for 200 and 300mm equipment from the same vendor.

Many of the wet bench optimization methods can be applied successfully to CMP. The polish and cleaning modules have continuous and intermittent idle UPW flows that may be necessary to prevent slurry caking and biogrowth, but typically are much higher than needed. Optimization studies, conducted by International SEMATECH, suggest that as much as a 60% reduction in UPW may be possible. Efforts are underway to incorporate these suggestions into vendor UPW flow specifications.

PFC Emissions Reduction

Climate change is another area in which the semiconductor industry has worked hard to achieve sustainable growth. The industry uses a number of potent greenhouse gases, including perfluorocarbons, sulfur hexafluoride and hydrofluorocarbons, collectively referred to as PFCs. These gases are used for both etching of the features on the computer chips and for the plasma-enhanced cleaning of reaction chambers used in chemical vapor deposition (CVD). They are vital to these semiconductor manufacturing processes and, in most cases, are unsurpassed in their process performance as well as in their low safety and health risks. The continued availability and use of these chemicals is considered critical to the future success of the industry.

Although the U.S. semiconductor industry contributes less than 0.1% to the total U.S. greenhouse gas emissions[6], the industry recognized early on that for sustainable growth of the industry, it was important that the industry makes a concerted effort to reduce its emissions, especially in light of the historic, rapid growth of the industry. Consequently, since 1993, the industry has diligently pursued a multi-pronged technology development strategy to reduce the emissions of these global warming gases to the atmosphere. As shown in Figure 5, the strategy has included alternative chemistries, process optimization, recovery/recycle and various forms of destruction or decomposition such as combustion, plasma dissociation, thermal chemical absorption and catalytic conversion.

Figure 5. Industry’s technology development strategy.

Universities, chemical suppliers, tool suppliers and the semiconductor industries have come together to collaborate on this critical issue. Over the more than eight years that the industry has worked on addressing this environmental concern, great strides have been made in developing a number of commercially available technologies. Figure 6 shows a simplified picture of a typical semiconductor manufacturing tool, either etch or CVD, and the technology options available today for reducing greenhouse gas emissions.

Figure 6. Different PFC Technology Options.

Of the two process applications, the chamber cleaning process is somewhat easier to deal with, since it is a process step, which takes place in the absence of the wafer; although improper chamber cleaning will negatively impact subsequent film deposition and product yield. Consequently, it has been possible to find alternative gases that do not require major process re-qualification. In fact, it has been found that C3F8 and c-C4F8 can be ‘drop-in replacements’ for C2F6[7,8], which is only partially (25-35%) consumed during the chamber cleaning process. Although these PFCs are potent greenhouse gases as well, they are more fully dissociated resulting in significantly lower emissions. This relationship is shown in Figure 7. This substitution of gases is an option especially valuable to the installed tool base, where fab space limitations may prevent addition of point-of-use abatement or in fabs where the distribution of NF3 is absent.

Figure 7. Alternative chamber clean gases.

The use of NF3 for chamber cleaning is being introduced into fabs with newer tools or by retrofitting of later model tools in the installed base. NF3 dissociates more easily in a plasma and, consequently, up to 95-99% of it is destroyed/consumed during the chamber cleaning operation. The NF3 is used in two ways: in one case the NF3 is diluted with helium and is used in-situ in the process chamber with the plasma struck during the cleaning step to dissociate the NF3; in the other case, the NF3 is dissociated in an Rf plasma upstream of the process chamber and the reactive atomic fluorine species flow to the process chamber for cleaning.

This second technique achieves somewhat higher NF3 destruction (i.e., 99%) and lower emissions, but currently forms significant quantities of molecular fluorine (F2) as a byproduct, which readily converts to HF in the presence of water. The fluoride, in turn, has to be recovered from the wastewater, normally in the form of calcium fluoride (CaF2), before it can be discharged. This additional wastewater treatment will impact fabs significantly and is something the industry is wrestling with right now.

In the area of etch gas alternatives, the industry has screened whole families of chemicals from hydrofluorocarbons (HFCs), hydrofluoroethers and iodo-compounds to unsaturated and cyclical fluorocompounds. Figure 8 shows a comparison of the emission reductions achieved with a number of potential etch gas candidates studied most recently[9].

Figure 8. Emissions reduction for various etch candidates.

While the gains in emissions reduction compared to C3F8, for example, are significant, few of these gases performs as well as the etch gases used currently in terms of photo-resist selectivity, anisotropy and/or etch rate. In addition, most of these compounds are more reactive and therefore less benign from an ESH point of view.

For both the chamber cleaning applications and the etch tools, there are a number of abatement options that have been developed over the years and are now commercially available. Combustion devices require high temperatures (900-1000ºC) to destroy all the PFCs to >95% and involve an integral water scrubber to remove the HF by-product from the combustion products. Plasma destruction works well for etch tools where PFC gas flows are smaller. Thermal or catalytic reaction with granular chemicals in a packed bed is another option to destroy the residual PFCs typically exhausted from a CVD or etch tool[10]. However, in the semiconductor industry, abatement is normally at the bottom of the hierarchy of preferred solutions due to the cost generally associated with abatement.

Several attempts have been made over the years to recover, treat and possibly recycle the PFCs recovered from the tool exhausts. However, the pretreatment of the dirty tool exhausts to remove acids, particles, pyrophorics, etc., has presented a major challenge. In addition, the reluctance by process engineers to accept recovered PFCs as process feed gas has been identified as a major hurdle to reuse of any recovered material.

The development of many of the technology options mentioned above has been stimulated by the proactive attitude of the industry with respect to ESH. In 1995, the industry began discussions with the U.S. EPA on a voluntary agreement for PFC emissions reduction, which resulted in a memorandum of understanding (MOU) signed in 1996 by most of the U.S. semiconductor manufacturers. At the close of 2000, this MOU was renewed for another 10 years. Under the MOU, the signatories agreed to make best efforts to reduce PFC emissions through annual emissions inventories, technology exchange seminars/conferences and evaluations of emerging technology options. By 1999, the U.S. semiconductor industry had conducted more than 40 technology evaluations documented in a state-of-the-technology report. This progress gave the industry confidence that an absolute emissions reduction goal of 10% from the 1995 levels by 2010 was technically feasible and achievable. Consequently, the U.S. industry in co-operation with the World Semiconductor Council was able to convince the global semiconductor industry to adopt this 10% goal worldwide. While a 10% decrease from the emission levels in 1995 does, on the surface, not appear to be very aggressive, given the industry’s growth in chip complexity and volume, it is estimated that this amounts to a >90% reduction from what the emission levels would be without any action.

It is already becoming clear that the efforts by the U.S. industry to reduce PFC emissions are paying off. For example, in the U.S. the total annual PFC emissions peaked in 1999 and decreased by approximately 8% in 2000, in spite of the strong growth in semiconductor manufacturing and sales in that year[11]. It is anticipated that this reduction in PFC emissions will be mirrored globally and will accelerate as the industry approaches the 2010 deadline for achieving the 10% reduction goal.


Several examples of resource conservation opportunities have been described for energy, water and PFC usage in semiconductor manufacturing. Reduction in the use of resources clearly benefits the environment, and also results in profitability and cost benefits for the business. Additionally, several of these resource conservation opportunities also demonstrate process performance benefits, such as improved yield and reduced cycle time. Resource conservation through efficient use of resources is a critical factor in the future, sustainable growth of the industry.


[1] 1999 Annual Review, World Business Council for Sustainable Development, The MIT Press, January 2000, P.17-18.

[2] World Wide Fab Energy Survey Report, published by International SEMATECH June 30, 1999, Technology Transfer # 99023669B-ENG.

[3] ‘International Technology Roadmap for Semiconductors’, Environment, Safety and Health Section, 2001 Edition.

[4] A. Hand, ‘Wafer Cleaning Confronts Increasing Demands’, Semiconductor International, August 2001.

[5] L. Mendicino, T. Dietrich, J. Molloy, B. Raley, ‘Resource Conservation Through Wet Cleans Optimization and Reclaim’, SEMICON West 2001, SEMI Technical Symposium: Innovations in Semiconductor Manufacturing, June 2001.

[6] V. Vartanian et al., ‘Litmas Plasma Abatement Long-Term Reliability Test’, Electrochemical Society Proceedings, Vol. 2000-7, P.10.

[7] Sey-Ping Sun et al., ‘Reducing PFC Emissions Using C3F8-Based CVD Clean’, Semiconductor International, Vol. 21, No. 2, P.85, February 1998.

[8] Uwe Schilling et al., ‘Evaluation of C4F8 as Cleaning Gas in AMAT DxL Chamber on 200mm Wafers’, TT# 01084152A-TR, August 2001.

[9] R. Chatterjee et al., ‘Update of MIT Alternative Chemistries for Dielectric Etch’, PFC Working Group Meeting, International SEMATECH, October 2000.

[10] W. Worth, ‘Reducing PFC Emissions: A Technology Update’, Future Fab International, Vol. 9, P.57-62.

[11] D. Lassiter, ‘SIA Partners PFC Emissions’, communication to EPA MOU partners, August 2000.


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