Section 4 Introduction: Lithography, Equipment and Materials Future Fab Intl. Volume 23, July 09, 2007
This section provides a comparative overview of the leading next-generation lithographic technologies and an emerging nonlithographic patterning technique. It offers a concise summary of each option’s strengths and challenges in the sub-32nm regime.
Daniel J.C. Herr, Semiconductor Research Corporation, Peter Silverman, Intel Corporation

 Accurate Fin Patterning in Emerging Devices for 32nm and Beyond Future Fab Intl. Volume 23, July 09, 2007
For advanced CMOS technology nodes, multiple-gate devices (MuGFETs; FinFETs) are investigated as an alternative for classical planar CMOS.
Koen Snoeckx, imec, Rita Rooyackers, imec, Malgorzata Jurczak, imec, Abhisek Dixit, Ph.D. student

 Finding the Best Solution for 45nm Lithography Future Fab Intl. Volume 23, July 09, 2007
The semiconductor industry is always looking ahead to next-generation technology requirements. As 65nm devices are being ramped into production, development is already under way for future 45nm processes. Each new device generation has been achieved using extensions of optical lithography; successfully transitioning over the years from i-line steppers to DUV scanners and now to immersion technology. Lithography at the 45nm node brings new challenges as immersion technology is adopted in volume production. Immersion scanners require ultrahigh numerical aperture (NA) lenses with advanced polarization control, and also must deliver defectivity performance and throughput comparable to today’s leading-edge dry scanners.

 High Index Immersion: A Question of Materials Development Future Fab Intl. Volume 23, July 09, 2007
The progression of lithography technology toward ever-more-tightly resolved pitches has the associated burden of placing successively greater challenges on each new lithography generation.
SEMATECH (Intel assignee), Albany, NY

 The Future of Semiconductor Lithography: After Optical, What Next? Future Fab Intl. Volume 23, July 09, 2007
The leading contenders for next generation lithography (NGL) are reviewed: extreme UV, electron-beam and nanoimprint lithography (NIL). It is possible that none of them will win out over 193 lithography with double patterning and highindex materials.
Chris Mack, Lithoguru.com

 With the Right Tools, You Can Build Anything. Future Fab Intl. Volume 23, July 09, 2007
In the past, people created a lasting impression by building something big. Today, great achievements come in much smaller packages. In the future, they'll be even smaller.

 Leading-edge Mask Patterning for 130-100 nm Devices Future Fab Intl. Volume 9, January 07, 2000

Frank Abboud, Etec Systems, Inc

 Zero Yield – The Price of Field-Induced Reticle Damage Future Fab Intl. Volume 22, January 09, 2007
Whereas electrostatic damage to reticles used to be a catastrophic but fairly easily detected event, the nature of the damage is changing. Reticle damage now builds up progressively, causing a gradual degradation of critical dimensions (CD) and ultimately causing the formation of bridges across clear areas. Thus a mask that originally produces perfect devices can deteriorate during use and print increasingly defective images, but the tiny defects are highly localised and can be very difficult to detect. This type of fault can escape detection until the devices fail final test, by which time the WIP racks are full of defective wafers – that is a yield manager’s worst nightmare. This paper explains the changing nature of reticle damage and why established static control precautions used in fabs do not adequately protect against this risk.
Gavin Rider, Microtome

 193nm Immersion-Related Defects and Strategies of Defect Reduction Future Fab Intl. Volume 22, January 09, 2007
193nm immersion lithography has water filled in between the front lens and wafer, forming a water meniscus. The water meniscus moves with the exposure head across the wafer. Various physical and chemical interactions between the water and resist stack can occur, which lead to water immersion-related defects: Bubbles in the water can distort the exposure image; water droplets left on the wafer surface may deteriorate the local resist performance; water can transport particles to the wafer surface and deposit there. This paper analyzes the formation mechanisms of the immersion-related defects, and strategies for defects reduction are proposed.
Yayi Wei, Qimonda, Stefan Brandl, Qimonda, Frank Goodwin, Qimonda, David Back, Qimonda

 Challenges in Directed Self-Assembly[1] Future Fab Intl. Volume 22, January 09, 2007
This report provides a framework for assessing families of self-organizing materials as smart resists, with enhanced dimensional control, and as systems that exhibit novel and complex functionality. It represents a first step toward realizing material and process solutions for extending optical patterning and enabling affordable and robust fabrication of useful sub-32nm nanostructures.
Daniel J.C. Herr, Semiconductor Research Corporation

 International EUV Initiative (IEUVI) Overview; Challenges and Collaborative Efforts Future Fab Intl. Volume 21, July 01, 2006
For several years now, both technical and commercialization challenges for extreme ultraviolet lithography (EUVL) have been much reported. By 2000, a handful of EUVL R&D efforts had been established at various locations in Europe, Japan and the United States; by late 2002, several solid efforts to enable key infrastructure worldwide were under way. However, there was no entity that addressed the coordination of EUVL infrastructural issues among the different geographic regions. In autumn 2003, the International EUV Initiative (IEUVI)[1] was launched to further the coordination of collaborative efforts among leading EUVL R&D consortia and to address infrastructural issues for commercialization. It built on an earlier coordination effort between Japan’s only EUVL R&D entity ASET[2] and the U.S. organization EUV LLC[3] by expanding membership to CEA/LETI[4] of France, SEMATECH[5] of the U.S. and several others who joined as members since then. The IEUVI coordinates R&D activities by identifying opportunities for inter-regional benchmarking and collaboration. It primarily addresses EUVL infrastructural issues, as a result of collecting technical inputs from its Technical Working Groups (TWGs), and identifies possible showstoppers for commercialization. The initiative meets three times annually. Activities are posted at http://www.ieuvi.org.
Paolo Gargini, Intel Corporation, Ginger Edwards, SEMATECH, Kim Dean, SEMATECH, Phil Seidel, International SEMATECH, Koichi Toyoda, EUVA, Vivek Bakshi, SEMATECH, Stefan Wurm, SEMATECH, Yumiko Takamori, Intel Corporation, Giang Dao, International SEMATECH, Serge Tedesco, CEA-Leti, Shinji Okazaki, ASET, Masashi Ogawa, EUVA, Dieter Gotz, Medea

 INTRODUCTION SECTION 5 - LITHOGRAPHY, EQUIPMENT AND MATERIALS Future Fab Intl. Volume 21, July 01, 2006
Emerging 193nm immersion and EUV lithographic technologies share several critical performance challenges. As these technologies drive toward their projected ITRS insertion dates, shown in Figure 1, the fabrication community increasingly looks for enabling and affordable innovations from the tool component, mask, and resist sectors. This section of Future Fab explores the status and design considerations of key potential showstoppers within the lithographic infrastructure.
Daniel J.C. Herr, Semiconductor Research Corporation

 INTRODUCTION SECTION 5 - LITHOGRAPHY, EQUIPMENT AND MATERIALS Future Fab Intl. Volume 21, July 01, 2006
Lithography sets the pace for semiconductor technology development. The ever-increasing number of transistors per chip which are provided by lithography scaling enable innovation and the constant stream of new products which make the semiconductor industry so vital. Historically, lithography scaling has been a relatively “simple” matter of increasing NA and reducing wavelength. The introduction of chemically amplified resists to enable DUV lithography in the mid-1990s was the most radical change in the past decade. Unfortunately, things are no longer “simple.” Wavelength and NA scaling has failed to keep pace with transistor dimension scaling, resulting in the need for major changes in lithography, including the introduction of advanced optical proximity correction, phase shift masks and off axis illumination. In the future there will be even greater changes, including immersion lithography and EUV lithography.
Peter Silverman, Intel Corporation

 Next-Generation Resolution Enhancement With Fast Inverse Lithography With Fast Inverse Lithography Future Fab Intl. Volume 21, July 01, 2006
Many RET technologies, such as ruleand model-based OPC, the use of subresolution assist features and various PSM methodologies, can be thought of as heuristics employed in an attempt to design improved photomasks. These conventional approaches are running into severe difficulties at advanced semiconductor technology nodes (90nm and beyond). We discuss how one can find an optimal photomask by rigorously solving the inverse lithography problem. The design of an optimal mask takes into consideration not only pattern fidelity under nominal conditions, but also the size of the process window and the constraints and costs of mask manufacturing. By formulating the problem in a rigorous mathematical framework, we find highly optimal solutions which do not arise from traditional ad hoc approaches. The resulting masks often provide substantially improved depth-of-focus and exposure latitude, enabling geometries that may be otherwise unattainable.
Daniel S. Abrams, Luminescent Technologies, Inc., Linyong Pang, Luminescent Technologies, Inc., Andrew Moore, Luminescent Technologies, Inc., Grace Dai, Luminescent Technologies, Inc., Gordon Russell, Luminescent Technologies, Inc.

 Sub 30nm Photoresist Design Considerations: Molecular Nanotechnology Future Fab Intl. Volume 21, July 01, 2006
The International Technology Roadmap for Semiconductors mandates photo-lithographically defined features below 30nm for high-volume manufacture of logic and memory devices. However, in order to accomplish this, challenges to successfully transforming optical information encoding the features into patterns of matter must be overcome. These include sensitivity, fidelity (resolution) and noise rejection (roughness, anisotropy). Further complexity and challenges come from diversity in patterning environments (i.e., vacuum, inert gas and immersion) as well as wavelengths (i.e., 193nm and 13.5nm). As feature sizes comparable to molecules are patterned, the implicit chemical and physical consequences need to be reconciled through technical advances in resist design. Approaches to such advances include refinement of both chemically amplified and nonchemically amplified systems as well as the new field of self assembly. In order to squeeze all possible performance from photolithography, fundamental assumptions in process chemistry may be called into question (i.e., film preparation, development chemistry, etc.). Thus, this article discusses means to impose more “order on chaos.”
Dr. Robert P. Meagley, Intel Corporation

 Prospects for Immersion Lithography at the 45nm Half-Pitch and Beyond Future Fab Intl. Volume 20, January 07, 2006
Understanding the extendibility of 193nm immersion lithography is necessary for strategic investment decisions about its supporting infrastructure and for the development of competing technologies. This paper reviews the key risks and concludes that water-based immersion lithography is positioned to reach a numerical aperture (NA) of 1.3, appropriate for 45nm half-pitch patterning. Extending immersion to the 32nm halfpitch could be enabled by the invention of suitable high-index materials. A change in reduction ratio or adjustments to the mask absorber stack may be required to accommodate reticle polarization.
Andrew Grenville, SEMATECH

 SECTION 5 – INTRODUCTION: LITHOGRAPHY, EQUIPMENT AND MATERIALS Future Fab Intl. Volume 20, January 07, 2006
These are exciting times for lithography. After many false starts (X-ray, electron projection, 157nm, etc.) and after years of concern that perhaps there was no “next generation lithography,” it has become clear that there are not one, but two successors to standard optical lithography: 193 nm immersion lithography and EUV lithography.
Peter Silverman, Intel Corporation

 SECTION 5 – INTRODUCTION: LITHOGRAPHY, EQUIPMENT AND MATERIALS Future Fab Intl. Volume 20, January 07, 2006
The 2005 ITRS projects optical immersion and EUV lithography insertion dates into manufacturing of 2010 and 2013, respectively. While significant engineering challenges remain, 193nm aqueous immersion lithography represents a potentially manufacturable solution through the 45nm node. With considerable innovation in optimizing and matching optical materials, ultra-high-index fluids, and resists, it may be possible to extend this technology through the 32nm node. For EUV, considerable challenges remain in the stability, uniformity and defect density of the materials used in the critical optical components. It is noteworthy that the extensibility of these potential exposure tool solutions appears to be gated by specific material challenges. Additionally, long-range dimensional control, line edge roughness [<4nm (3?)], and the current trade-offs between image blur, photospeed and resolution in patterned resist materials are emerging as some of our community’s most difficult patterning challenges.
Daniel J.C. Herr, Semiconductor Research Corporation

 SPECIAL FOCUS ON IMMERSION -- Immersion Lithography and the 32nm Node Future Fab Intl. Volume 20, January 07, 2006
With the advent of any new and innovative technology, a key area of interest for manufacturers is to understand how far its capabilities can be extended, and immersion lithography is certainly not any different. Within the next 18 months, most top IC companies will begin processing 45nm devices on immersion scanners. Therefore, the focus of engineering efforts is rapidly shifting from 45nm manufacturing to the feasibility of extending immersion lithography to the 32nm node and beyond.
Soichi Owa, Nikon , H. Magoon, Nikon

 SPECIAL FOCUS ON IMMERSION -- Remarkable Immersion Results in Two Years Future Fab Intl. Volume 20, January 07, 2006
As long as tools have been brought to market, observers of the lithography scene have said that equipment makers need to develop new technologies faster, form more effective cooperative relationships and be more responsive to customer needs for cost-effective use of lithography equipment and extension of existing technologies. ASML’s work on immersion lithography over the last two years provides a real-world example of how one company is addressing these needs and successfully bringing technology to a productive level in a remarkably short time.
Ron Kool, ASML

 SPECIAL FOCUS ON IMMERSION -- The Extension of Immersion Lithography: An Update From ASML, Canon and Nikon Future Fab Intl. Volume 20, January 07, 2006
The rapid pace of progress in researching, developing and implementing production- worthy 193nm immersion lithography technology has been truly amazing. In just a few short years, the pioneering results of many researchers have been adopted and exposure tools adapted to enable significant development (and now delivery) of numerous advanced tools to labs and pilot-line fabs worldwide. Slowly but surely, it seems, the early concerns among the demanding lithography community are being eliminated – concerns for image degradation via bubbles, temperature gradients, resist effects and, ultimately, defectivity, which means yield. Some recent results from IMEC have demonstrated defectivity levels of 0.04/cm2 with a 0.85NA tool, and research continues at State University of New York, Albany, with a consortium focused on demonstrating productionworthy 193nm immersion lithography processing with the same 0.75NA immersion tool utilized to fabricate some early demonstration 90nm logic devices. These worldwide activities and steady progress surely demonstrate the viability and commitment to implement 193nm immersion lithography for HVM (highvolume manufacturing). All of this progress has been aided by the fortuitous capability of water as the fluid medium for 193nm exposure. If we had to invent a new fluid for demonstrating 193nm immersion capability, the technology would still be under development and 157nm dry lithography would still be on the ITRS roadmap.
David Kyser, Applied Materials

 SPECIAL FOCUS ON IMMERSION: Feasibility Quest of Immersion Lithography Future Fab Intl. Volume 20, January 07, 2006
Immersion lithography is now considered to be the only viable candidate to realize 65nm to 45nm half pitch. The fact that real chips have already been fabricated with immersion confirms its usefulness. We demonstrated the basic benefits of immersion, such as DoF enhancement, in the early stage of our feasibility study. The greatest challenge for this technology is the generation of new immersion specific defects, such as bubbles and watermarks. However, our latest results show the solution is within our grasp.
Akiyoshi Suzuki, Canon, Phil Ware, Canon

 Update on the Extensibility of Optical Patterning via Directed Self-Assembly Future Fab Intl. Volume 20, January 07, 2006
In a previous article, (Future Fab International, January 2001) we considered some early directed assembly results with one family of high information content resist materials, diblock copolymers. It presented a brief justification for directed self-assembly (DSA), some initial thoughts on the language and dynamics of self-assembling materials, and the potential use of directed selfassembly to achieve higher (10nm) resolution and to pattern complex geometries and devices. The language of self-assembly was introduced through a few highlevel principles that would aid the design of diblock copolymer resist materials to express desired structural properties. This justification also explored the potential of DSA to extend optical patterning to the deep nanodomain. For the foreseeable future, it appears more likely that self-assembling materials will complement and augment, rather than replace, known top-down lithographic technologies. This earlier paper compared two complementary templated assembly approaches with conventional top-down lithography, show in Figure 1.
Daniel J.C. Herr, Semiconductor Research Corporation

 Directions in Maskless Lithography, 2005 Future Fab Intl. Volume 19, June 28, 2005
Maskless lithography (ML2) has been developing renewed interest as the cost and challenges of optical lithography masks increase. There is renewed worldwide effort in both charged particle maskless (CP-ML2) and optical maskless (O-ML2). The requirements are readily defined but the implementation path is not necessarily obvious.
Walter Trybula, International SEMATECH

 Immersion Lithography: Out of the Lab and Into the Fab Future Fab Intl. Volume 19, June 28, 2005
The revolutionary concept of using immersion lithography in semiconductor manufacturing is fast becoming a reality. After just a few years of development, this technology will transition from laboratory experiments, to critical applications in semiconductor fabs around the world. Nikon began making early 0.85 NA immersion systems available to customers last year, and in addition to providing dramatically enhanced depth of focus (DOF), the key performance metrics evaluated have all been superior to, or equivalent to that of dry tools, with no bubbles detected to date. All early immersion learning has been incorporated in design of the production model NSRS609B (shipping Q4 2005) which features an NA=1.07 and an innovative new tandem stage design delivering 130 wafers per hour, and supports Nikon’s polarization control system, POLANO. After recognizing the potential for immersion technology early on, Nikon has been executing to an aggressive roadmap to enable immersion lithography to successfully move out of the lab and into the fab.
Soichi Owa, Nikon , Hiroyuki Nagasaka, Nikon , Yuuki Ishii, Nikon , Kenichi Shiraishi, Nikon Corporation, Shigeru Hirukawa, Nikon

 Introduction: Lithography, Equipment and Materials Future Fab Intl. Volume 19, June 28, 2005
For the past 40 years, lithography has been the major driving force behind the extension of Moore’s Law. Without the improvements in resolution and critical dimension control provided by new lithography technologies, the personal computers, cell phones, CD players and the other advanced electronic products that have become such an essential part of our lives would not be possible.
Peter Silverman, Intel Corporation

 Introduction: Lithography, Equipment and Materials Future Fab Intl. Volume 19, June 28, 2005
The art and science of lithography technology has advanced very much in recent times, as evidenced by the variety of high-performance integrated circuits that this critical fabrication technology has enabled and continues to enable. One of the most critical enablers to the success of optical projection lithography has been the concurrent advances in mask-making technology, without which progress would be stymied. However, this progress has come with a price, namely the ever-increasing cost of high-precision and complex reticles with ever-increasing pixel count and OPC implementation. Such costs have motivated the IC industry to explore the possibility of mask-less lithography (ML2) for a very long time, especially for IC applications where the costs of a reticle set are difficult to amortize over a small number of wafers (i.e. low-volume). In a classic application of ML2 technology, IBM once implemented E-beam direct write lithography for custom designs of interconnect metallization on bipolar technology master-slice wafers. More recently, STM utilized E-beam direct-write lithography in a sophisticated hybrid mode with optical lithography to greatly accelerate the development of their 65nm CMOS technology. But the economics of high-volume IC fabrication will continue to favor optical lithography until a cost-effective ML2 technology is developed and implemented.
David Kyser, Applied Materials

 Why Polarization Control is Required on Advanced Lithography Systems Future Fab Intl. Volume 19, June 28, 2005
Nikon Corporation is a worldwide leader in lithography equipment for the microelectronics manufacturing industry with more than 7,600 exposure systems installed worldwide. Nikon offers the most extensive selection of production-class steppers and scanners in the industry. These products serve the semiconductor, flat panel display (LCD) and thin-film magnetic head (TFH) industries. Nikon Precision Inc. provides service, training, applications and technical support, as well as sales and marketing for Nikon lithography equipment in North America.

 Cost-Effective Lithography for 65 nm Production Future Fab Intl. Volume 18, January 12, 2005
Since 1980, Nikon Corporation has been revolutionizing lithography with innovative products and technologies. With more than 7,200 exposure systems installed worldwide, the company is the worldwide leader of productionclass steppers and scanners for the semiconductor, flat panel display (LCD), and thin-film magnetic head (TFH) industries. Nikon Precision Inc. provides service, training, applications, and technical support, as well as sales and marketing, for Nikon semiconductor equipment in North America.

 Development Of Extreme Ultraviolet Lithography In Japan Future Fab Intl. Volume 18, January 12, 2005
The International Technology Roadmap for Semiconductors requires a volume production lithography tool enabling us to print resist patterns with 45nm half-pitch by 2010. To meet the goal, the US, EU and Japan are developing extreme ultraviolet lithography technologies in collaboration or in competition.
Yasuhiro Horiike, EUVA, Masashi Ogawa, EUVA

 SECTION 5: INTRODUCTION Future Fab Intl. Volume 18, January 12, 2005
Semiconductor lithography is rapidly approaching a major turning point. Exposure tool prices, which were near $1 million in the late 1980s, are now at about $20 million and still climbing. A single exposure tool and coat-develop track now costs as much as a full 6-inch factory did in the mid-1980s. Although some of the price increase has been offset by run rate increases, it appears as if the run rate of exposure tools has reached a plateau.
Peter Silverman, Intel Corporation, David Kyser, Applied Materials

 The Extensibility Of Optical Patterning Via Directed Self-Assembly Of Nano-Engineered Imaging Materials Future Fab Intl. Volume 18, January 12, 2005
How far can we extend optical patterning? At the November 1992 Semiconductor Technology Workshop, the demise of optical patterning was projected to occur in 2001, after the 180 nm technology node. This corresponded to nine years or three technology nodes, n+3, out from the then-current 500 nm technology node, n. The 1994 and 1997 National Technology Roadmaps for Semiconductors (NTRS) conveyed similar messages, that optical lithography would end after the 130 nm and 100 nm generations, respectively, or n+3 nodes out from the current technology nodes.
Daniel J.C. Herr, Semiconductor Research Corporation

 Why Optical Lithography Needs EUV Mask Blank Development Future Fab Intl. Volume 18, January 12, 2005
It is still not clear which technology will win in the race for high-volume 45 nm and 32 nm production – EUV or optical. Three years ago, according to one major semiconductor maker, the choice was clear: EUV was the technology that would save us. Lithographers, clever as they are, thought: optics are all the same, from a microscope to a scanner, and if it works there, then it can work here. Thus immersion lithography was proposed as the savior from all those terrible EUV obstacles (and of course 157 nm). The most daunting obstacle for EUV, aside from the optics, the source, the resist … the mask!
John G Maltabes, Freescale Semiconductor

 Economic Challenges on the Path to 22 nm Future Fab Intl. Volume 17, June 21, 2004
Economics has always been a driving force within the semiconductor industry. The rapid development of semiconductor technology enabled vast new markets and seemingly unlimited potential for growth. The fundamental driving force in the industry has been increased function and performance with decreasing cost per bit.
Karen H. Brown, Independent Consultant

 Equipment Options on the Road to the 22 nm Node: Decisions, Decisions Future Fab Intl. Volume 17, June 21, 2004
Predicting technology options significantly into the future is a fool’s errand. Many factors come into play that cannot easily be predicted. It is possible, however, to examine the options that can be foreseen this point and identify the limitations or potential to meet the requirements for a future technology generation.
Lloyd C. Litt, Freescale Semiconductor, Bernie Roman, Freescale Semiconductor, Will Conley, Freescale Semiconductor, Jonathan Cobb, Freescale Semiconductor

 Photomask Costs: Damming the Rising Tide Future Fab Intl. Volume 17, June 21, 2004
For years, maskmakers labored in nearcomplete anonymity. Recently, however, with the advent of million-dollar mask set, maskmakers have entered center stage.
Ken Rygler, Rygler & Associates

 Resist Road to the 22 nm Technology Node Future Fab Intl. Volume 17, June 21, 2004
The resist road to the 22 nm technology node is going to be a difficult one to ply. Conventional resist technology will be resolution-limited at the 22 nm design rule. Chemical amplification chemistry runs into “diffusional limits” with high-activation energy resist systems that are not extendible to this node, while lowactivation energy ones may be extendible to this node, but at the cost of significant outgassing and poor line-edge roughness (LER).
Uzodinma Okoroanyanwu, Advanced Micro Devices, Jeroen H. Lammers, Philips Research

 Section 5 Introduction, Vol. 17: Lithography, Equipment and Materials Future Fab Intl. Volume 17, June 21, 2004
Most semiconductor companies are aggressively ramping their 90nm production technology. Assuming that the industry stays on a two-year technology cycle (and history shows that this is a good assumption), in a mere eight years the 22 nm generation will be in highvolume production. In less than six years, 22 nm technology development must start. Is this possible, or is it just a dream? Will there be a 22nm generation?
Peter Silverman, Intel Corporation

 Section 5 Introduction, Vol. 17: Lithography, Equipment and Materials Future Fab Intl. Volume 17, June 21, 2004
There are many challenges to overcome before reaching the end of the path to 22 nmlevel technology, including both technical and economic challenges. Historically, the main driving force in the semiconductor industry has been ever–increasing functionality and everdecreasing cost per function.
David Kyser, Applied Materials

 10 Years of Aerial Image Measurement Systems – AIMS™ Future Fab Intl. Volume 16, February 03, 2004
AIMS has become a standard in mask shops and is now entering the wafer fabs.
Burkhard Stegemann, Carl Zeiss SMT-Nano Technology

 Mask Data Preparation Issues for the 90 nm Node: OPC Becomes a Critical Manufacturing Technology Future Fab Intl. Volume 16, February 03, 2004
Lithography is the process that defines the patterns on the wafer. As such, it is the key enabler of Moore’s Law, which states that the number of transistors on a chip doubles every two years. Unfortunately, improvements in lens design and reductions in exposure wavelength have occurred more slowly than required by Moore’s Law. As a result, whereas once we printed circuits with dimensions more than two times the wavelength of the exposure light, in today’s leading-edge 90 nm technology the features being imaged are often less than half the wavelength of the exposure light.
Chris Spence, Advanced Micro Devices

 SECTION 4 INTRODUCTION, VOL 16: Lithography, Equipment and Materials Future Fab Intl. Volume 16, February 03, 2004
The science of semiconductor technology continues to make progress, driven by necessity plus innovation, and the discipline of microlithography is no exception. With the emergence of sub-wavelength patterning, enabled by diffraction-limited optical systems in modern exposure tools, there is a quest to obtain the maximum resolution capability and process window, coupled with process control, via optical lithography technology.
Peter Silverman, Intel Corporation, David Kyser, Applied Materials

 The Prospects for Liquid Immersion Lithography Are Becoming More Solid Future Fab Intl. Volume 16, February 03, 2004
Liquid immersion may enable optical projection lithography to meet the needs of the semiconductor industry at the 45 nm node and even beyond. Its attractiveness stems from reliance on much of the existing infrastructure, such that with relatively few modifications it may extend the usefulness of current technologies. Recent simulations and experimental results surveyed in this paper indicate that no major obstacles have been identified. Still, full implementation of liquid immersion awaits more detailed studies on fully engineered pilot systems.
M. Switkes, Massachusetts Institute of Technology, M. Rothschild, Massachusetts Institute of Technology, W. Trybula, International SEMATECH, M. Yeung, Boston University

 EUV Lithography without Pellicles: Working without a Net Future Fab Intl. Volume 15, July 11, 2003
Thermophoretic and or electrostatic methods show promise for protecting the mask from defects during EUV exposure. While the mask is not being used for wafer exposure, it may be protected by a removable mechanism. What will this strategy cost? A cost of ownership analysis will be used to examine the cost of various methods to verify that the mask is free of defects as a function of the required frequency of verification. The implications of wafers with printed mask defects on revenue are also discussed, and considerations for minimizing revenue loss are examined.
Lloyd C. Litt, Freescale Semiconductor, Scott Hector, Motorola Digital DNA Laboratories, Phil Seidel, International SEMATECH

 Immersion Optical Lithography at 193nm Future Fab Intl. Volume 15, July 11, 2003
Water immersion lithography is being considered as a potential ‘next generation lithography’ for optical imaging at 45nm device nodes and possibly beyond. This paper describes the opportunities and challenges for water immersion lithography at 193nm. Water is an attractive choice because of its relatively high index (1.437 at 193nm), its low absorption (0.036 cm-1 at 193nm), and its ease of handling. The improvement potential offered by water can allow for effective numerical aperture values near 1.44. At such large propagation angles, the influences of polarization need to be addressed. Understanding fluids issues is critical and the impact of microbubbles is described.
Bruce W. Smith, Rochester Institute of Technology

 Production Enhancement of Lithography Through APC Methods Future Fab Intl. Volume 15, July 11, 2003
Productivity improvement is an inherent part of our business. A major aspect thereof is the switch to the 300mm wafer size. This is a very cost intensive measure that is economically reasonable mainly for memory-IC production. In recent years the semiconductor industry has discovered advanced process control (APC) as an effective measure to enhance productivity. Lithography is one of the areas where APC can support both product and process engineers in manufacturing enhancement. This article describes how Infineon has used the APC approach in the lithography department.
Joern Maeritz, Infineon Technologies AG, Armin Schels, Infineon Technologies AG

 Resolution Enhancement Techniques for the 90-nm Technology Node and Beyond Future Fab Intl. Volume 15, July 11, 2003
Lithography resolution can be increased by strategies that involve the exposure tool, the mask, the photoresist or the process. Decreasing exposure wavelength has been the trend in exposure tools – from the mercury lamp 436nm g-line and 365nm i-line, to the 248nm KrF and the 193nm ArF excimer laser (and perhaps soon the 157-nm F2 laser). The use of multiple resolution enhancement techniques (collectively referred to as RETs) has expanded the capability of each exposure tool generation beyond what was once considered possible. Advances have been – and are being – made in mask design, photoresists and exposure illumination, as well as in process technology. Here we describe several methods of resolution enhancement that have been developed for customers of Applied Materials in partnership with Canon and Numerical Technologies, Inc, which is now part of Synopsys, Inc.
David Bergeron, Applied Materials, Michael Smayling, Applied Materials, Hong Du, Applied Materials, Takeaki Ebihara, Canon, Toshihiro Oga, Canon, Dr. J. Tracy Weed, Synopsys

 SECTION 4 INTRODUCTION, VOL 15: Lithography, Equipment and Materials Future Fab Intl. Volume 15, July 11, 2003
As the semiconductor industry slowly recovers from the economic downturn, it’s facing an accelerated technology roadmap and shortened product lifecycles. The semiconductor manufacturer’s challenge is to balance the time to introduce new technologies with reasonable investment costs at minimized risk. Lithography exposure tools are often the most expensive in the wafer fab and therefore dominate miniaturization progress. Patterning of many layers in integrated circuit manufacturing requires a large number of exposure tools, resulting in high total costs for lithography equipment.
Lloyd C. Litt, Freescale Semiconductor, Ernst Richter, Inotera Memories / Qimonda

 ArF Scanner Evaluation Future Fab Intl. Volume 14, February 11, 2003
Aggressive shrink roadmaps urge lithographers to push the imaging performance of their tools to a higher resolution. Among several techniques, 193 nm lithography is one option. Its advantage is that it can achieve a high resolution while keeping a reasonable k1 factor. ArF scanners represent a new technology and it has to be shown that their CaF2 optics is mature enough to be used in production. This paper looks at the performance of four ArF scanners that were used during the last two years at Infineon’s 200 mm site in Dresden, Germany. Their performance will be evaluated by observing imaging parameters and intensity on wafer level. It will be shown that the performance of ArF scanners has been significantly improved over three tool generations and that the requirements for production are met.
Manuel Vorwerk, Infineon Technologies AG, Peter Marek, Infineon Technologies AG, Jens Löbel, Infineon Technologies AG, Raphael Ehrbrecht, Infineon Technologies AG, Jörg Schenker , Infineon Technologies AG

 EUV Lithography without Pellicles: Working without a Net Future Fab Intl. Volume 14, February 11, 2003
In optical projection lithography used for high volume manufacturing of integrated circuits today, a membrane pellicle is used to protect the mask from defects. In EUV lithography, a membrane pellicle with thickness great enough for mechanical durability would absorb a significant fraction of the EUV radiation, significantly reducing throughput. Therefore, operation without a pellicle during EUV wafer exposure is expected. How will this be possible? Thermophoretic and or electrostatic methods show promise for protecting the mask from defects during EUV exposure. While the mask is not being used for wafer exposure, it may be protected by a removable mechanism. What will this strategy cost? A cost of ownership analysis will be used to examine the cost of various methods to verify that the mask is free of defects as a function of the required frequency of verification. The implications of wafers with printed mask defects on revenue are also discussed, and considerations for minimizing revenue loss are examined.
Lloyd C. Litt, Freescale Semiconductor, Phil Seidel, International SEMATECH, Scott Hector, Motorola Digital DNA Laboratories

 Photomask Supply Partnership to Optimise Cost and Value Future Fab Intl. Volume 14, February 11, 2003
Rising mask costs are regularly raised as a critical issue in the semiconductor industry, especially for the low-volume-per-design business segments in foundries and ASICs. The trends in mask costs are alarming and semiconductor fab managers are struggling to cope with this one-ignored piece of the cost structure. However, the cost must be put into context with the process and yield benefits afforded by these new complex masks. The work to characterize the value of these masks and insure that the leverage they afford is being optimally leveraged takes close partnership between the wafer lithographers and mask makers to execute successfully. This article will discuss the mask cost trends, issues of cost versus value, elements of mask cost and how they can be reduced or optimized.
Kurt. R Kimmel, International SEMATECH

 Technology Acceleration and the Economics of Lithography (Cost Containment and ROI) Future Fab Intl. Volume 14, February 11, 2003
Semiconductor manufacturing is a complex and lengthy process. Lithography represents a significant portion of the process and defines the smallest features that can be produced – a significant driving force behind the Industry. An additional driving force is the normal technology acceleration of the device characteristics. There has been a historical trend, called Moore’s Law, that projects the doubling of complexity every 18 months. This translates to a 70% reduction in feature size every three years. In order to achieve this complexity increase, additional and new processes must be employed in the fabrication of the devices. The typical 1/4ìm (or 250nm) process flow has 19 feature levels and approximately 270 individual process steps. The projected 90nm process flow will have 38 feature levels and well over 700 process steps. The increase in the number of levels requires a corresponding increase in the number of critical masks required to produce the circuits. With values of critical masks exceeding $100K, this addition drives up the cost of manufacturing. Accompanying this increase is the increase in the cost of the exposure tools as greater and greater precision is required in the manufacturing process. By itself, the increase in the quantity of process steps and the associated tooling required for production would cause a significant price impact on the semiconductor industry. However, as shown in Figure 1, the shrinking provides for a continual decrease in cost per function.
Walter Trybula, International SEMATECH

 193nm Resists: A Status Report – (Part Two) Future Fab Intl. Volume 13, July 08, 2002
In 1999 the ITRS roadmap proposed to roll out 130nm ground rule fabrication in 2002 with resolution enhanced KrF lithography or wavelength-shortened ArF lithography. The 2001 edition of the ITRS pushed the 130nm target to 2001. This acceleration puts even more pressure on the technology requirements. While the KrF technology is matured, ArF lithography still requires optimization even without resolution enhancement. This paper will focus on the ArF resist requirements. Selected critical issues, like line edge roughness and linearity, are reviewed.
Ernst Richter, Inotera Memories / Qimonda, L Völker, Infineon Technologies AG, T. Marschner, Infineon Technologies AG, S Machill, Infineon Technologies AG

 Achieving the 90nm Lithography Generation with Model-based OPC Future Fab Intl. Volume 13, July 08, 2002
Reproduced with kind permission: Lucas, K., et al., “Model-based design improvements for the 100nm lithography generation,” in Optical Microlithography XV, Anthony Yen, Editor, Proceedings of SPIE Vol. 4691, June 2002.

 Materials and Process Issues Delaying the Introduction of ArF Lithography into Production Future Fab Intl. Volume 13, July 08, 2002
The main materials and process integration issues responsible for the delayed production introduction of ArF lithography from 130nm technology node in 2001 to 90nm technology node in 2003-2004 time frame, are presented. These issues are significant, but they are not showstoppers, as creative ways exist for solving them. The first step is to tune processes to match material and chemical properties of ArF resists. Processes that have worked well at longer lithographic wavelengths are not optimal for ArF resists.
Uzodinma Okoroanyanwu, Advanced Micro Devices

 Nikon EPL Tool Latest Development Summary Future Fab Intl. Volume 13, July 08, 2002
In the development of Electron Beam Projection Lithography (EPL) Tool, one of the most important tasks is to develop the highspeed vacuum stage system and reliable vacuum body system. Nikon has a long history of over 22 years in precision stage development for its Optical Lithography Tools as well as over 10 years in EB instrument development such as EB 60 with NTT. Recently, lithography stages have been developed based on air bearing and linear motor technologies.
Takaharu Miura, Nikon Precision Europe GmbH, Tatsuo Sato, Nikon Precision Europe GmbH, Masaya Miyazaki, Nikon Precision Europe GmbH, Kazunari Hada, Nikon Precision Europe GmbH, Yu Sato, Nikon Precision Europe GmbH, Masateru Tokunaga, Nikon Precision Europe GmbH, Yukio Kakizaki, Nikon Precision Europe GmbH

 193nm Resists: A Status Report (Part One) Future Fab Intl. Volume 12, February 02, 2002
Never before in the past an introduction of a new wavelength into the production is planned and will be realized so aggressive as with 193nm. Only six years from first papers till pilot run are proposed. With this fast implementation the industry will keep the TWG/ITRS roadmap on a two years cycle, but they will pay the price.
G Czech, Infineon Technologies AG, Ernst Richter, Inotera Memories / Qimonda, O Wunnicke, Infineon Technologies AG

 Advancements in Optical Lithography Needed to Realize the Roadmap Future Fab Intl. Volume 12, February 02, 2002
This shortening of the product lifecycle has pressured manufacturers to move in the technology nodes as evidenced in successive publications of the International Roadmap for Semiconductor Technology (ITRS), shown in Figure 2. The consequence of this acceleration is a requirement for smaller features in a shorter period of time.
Giang Dao, International SEMATECH, Anthony Yen, International SEMATECH, Walter Trybula, International SEMATECH

 Intrinsic Birefringence in Crystalline Optical Materials: A New Concern for Lithography Future Fab Intl. Volume 12, February 02, 2002
The push to shorter wavelengths in optical lithography to achieve smaller circuit feature sizes has put increasingly stringent demands on the optical materials’ properties. First, the requirement that the lens material be highly transparent at the illumination wavelength limits the choice of materials as the wavelength decreases.
John H Burnett, National Institute of Standards and Technology, Zachary H Levine, National Institute of Standards and Technology, Eric L Shirley, National Institute of Standards and Technology

 Materials and Process Issues Delaying the Introduction of ArF into Production Future Fab Intl. Volume 12, February 02, 2002
The insertion of ArF (193nm) lithography into production was expected to take place in 2001 at the 130nm technology node[1]. Instead, KrF (248nm) lithography was extended, aided by improvements in resist materials, availability of high numerical aperture (NA) exposure tools, and successful implementation of resolution enhancement techniques like phase shifting masks, off-axis illumination, and optical proximity correction schemes.
Uzodinma Okoroanyanwu, Advanced Micro Devices

 PREVAIL - IBM's E-Beam Technology For Next Generation Lithography Future Fab Intl. Volume 12, February 02, 2002
Lithography, as the term is used here, is the technique of generating microscopic pattern images or features with ever smaller dimensions on semiconductor (SC) substrates coated with a radiation-sensitive layer known as ‘resist’. Feature size reduction has been the single most important factor in the productivity improvement, attained by the semiconductor industry since its inception, as predicted and increasingly edicted by ‘Moore’s Law’. Consequently, lithography has become a critical, even the most critical, process in the series of many to fabricate integrated electronics (IC) chips. Light of various wavelengths or colors extending now into the ‘deep’ ultra-violet (DUV) has been and continues to be the radiation used in the mainstream IC manufacturing environment. ‘Optical steppers’, as such lithography machines are widely known, can only reproduce a chip pattern from a master pattern on a ‘mask’, usually imaging it reduced in size. Building such masks was and increasingly is an expensive process, and is therefore becoming less practical/affordable in the environment, where quick or frequent circuit modifications are required in response to changing customer demands. On the other hand, once a design is finalized and volume production is the objective, the key advantage of optical steppers is the extraordinarily high throughput achievable.
Hans C Pfeiffer, IBM Microelectronics Division, Werner Stickel, IBM Microelectronics Division

 Sub-50nm Gate Patterning Using CD Trim Techniques and 248nm or 193nm Lithography Future Fab Intl. Volume 12, February 02, 2002
It is well known that the continuous downscaling of device feature sizes results in a massive increase of lithography investment costs. Especially, the transition to a lower wavelength is an important cost factor: not only are the tools very expensive, but also a lot of manpower and wafer lot-turns are required to develop the new resist processes. Moreover, these new materials are typically less mature than those of the previous lithography wavelength technology. Therefore, the possibility to extend the available fab tools for future device dimensions is always an important consideration, and should be investigated.
Ivan Pollentier, imec, Patrick Jaenen, imec, Christina Baerts, imec, Kurt Ronse, imec

 Extreme Ultraviolet Scanning Lithography – Supports Extension of Moore’s Law Future Fab Intl. Volume 11, June 29, 2001

Chuck Gwyn, EUV LLC , Glenn Kubiak, Virtual National Laboratory , Don Sweeney, Virtual National Laboratory

 Issues for Advanced Reticle Fabrication: (You want that reticle when?) Future Fab Intl. Volume 11, June 29, 2001

John G Maltabes, Freescale Semiconductor

 Meeting the Challenge: The 157nm Resist Development Program at International SEMATECH Future Fab Intl. Volume 11, June 29, 2001

Eugene D Feit, International SEMATECH

 The Current State of Calcium Fluoride: An Overview Future Fab Intl. Volume 11, June 29, 2001

Chris Van Peski, International SEMATECH, Rich Harbison, International SEMATECH, Walter Trybula, International SEMATECH

 157nm Lithography: The Design and Implementation of a Microstepper for Resist Development Future Fab Intl. Volume 10, July 01, 2001
The 1999 ITRS roadmap for semiconductors shows for the first time 157nm optical lithography as potential solutions for the 100nm and 70nm nodes (if phase-shifting masks are used). However, to meet this we require to have 157nm ready for 2003 for the 100nm node and 2006 for the 70nm node, all this from a ‘standing start’. This is a very difficult challenge.
Steve Bassett, International SEMATECH, Dominic Ashworth, Exitech Ltd, Julian Cashmore, Exitech Ltd

 Advanced Photo Mask Fabrication for NGL Future Fab Intl. Volume 10, July 01, 2001

Peter Huang, UMC

 Limits of Ultrathin Resist Processes Future Fab Intl. Volume 10, July 01, 2001

Uzodinma Okoroanyanwu, Advanced Micro Devices

 On the Maturity of ArF Resists: When Can they be Implemented in Manufacturing? Future Fab Intl. Volume 10, July 01, 2001

Kurt Ronse, imec

 Prevail: IBM's E-Beam Technology for Next Generation Lithography Future Fab Intl. Volume 10, July 01, 2001

Hans C Pfeiffer, IBM Microelectronics Division

 The Price of Success: The Cost of Lithography for the 130nm Node Future Fab Intl. Volume 10, July 01, 2001

Lloyd C. Litt, Freescale Semiconductor

 Lithography Trends: A Review and Outlook Future Fab Intl. Volume 9, January 07, 2000

Martin McCallum, International SEMATECH

 Optical Materials and Dectector Characterization for VUV Lithography Future Fab Intl. Volume 9, January 07, 2000

Rajeev Gupta, National Institute of Standards and Technology

 Potential of KrF Scanning Lithography for the 130nm Technology Node Future Fab Intl. Volume 9, January 07, 2000

Yuan Zhang, Canon, Phil Ware, Canon, Kenichi Kotoku, Canon, Yuiichi Yamada, Canon

 Resolution Enhancement with OPC/PSM Future Fab Intl. Volume 9, January 07, 2000

Frank M Schellenberg, Mentor Graphics Corporation

 The Integration of a Permanent Plasma Enhanced CVD Inorganic ARL for High Volume 0.35 μm CMSO Products Future Fab Intl. Volume 9, January 07, 2000

B Lowe, ZiLOG , S Buffat, ZiLOG

 A Photomask Inspection Roadmap Future Fab Intl. Volume 8, July 01, 2000

Wally Carpenter, International SEMATECH

 Dielectric Anti Reflection Coating Application in a 0.175 μm Dual-Damascene Process Future Fab Intl. Volume 8, July 01, 2000

GY Lee, Infineon Technologies AG, DM Dobuzinsky, IBM

 Higher Profits from Intelligent Semiconductor Equipment Maintenance Future Fab Intl. Volume 8, July 01, 2000

Steven Montgomery, SST

 Optical Materials and Detector Characterization for 193 nm and 157 nm Lithograpgy Future Fab Intl. Volume 8, July 01, 2000

John H Burnett, National Institute of Standards and Technology, Rajeev Gupta, National Institute of Standards and Technology

 Resist Design Concepts for 193 nm Optical Lithography: The Role of Materials and Process for Lithographic Performance Optimization Future Fab Intl. Volume 8, July 01, 2000

O Nalamasu, Bell Laboratories, AH Gabor, Arch Chemicals